IP cores to be integrated into SoC’s are not only extremely complex in themselves, but they will be operating within a hardware and software environment of a yet unknown level of complexity.

Through the addition of DAFCA’s light-weight ReDI™ instrumentation, the IP core developer and ultimate user can utilize the power of ClearBlue to carry out many validation and optimization tasks on the integrated core in-situ.  Below is a limited list of examples

• Provide observability and controllability to SoC integrators to increase IP reliability and usability
• Validate that the core is operating according to specification once integrated into the SoC
• Validate that the core is interacting with the rest of the SoC and the software according to specification
• Provide a facility to work around any interface issues that may arise as a result of integration and interaction with the SoC as a whole