DAFCA | Glossary

ASIC - Application Specific Integrated Circuit.

At-speed - A function carried out using the manufactured chip at its normal operating clock frequency.

BIST - Built-in Self Test.

ClearBlue - A combination of sophisticated EDA software and reconfigurable on-chip instruments used to discover, diagnose and even fix functional SoC bugs in-situ.

DFD - Design-for-Debug. The use of on-chip instrumentation, with specialized EDA software, to detect, diagnose, and debug functional errors in SoC's.

DFM - Design-for-Manufacturability.

DFT - Design-for-Testability. The insertion into an SoC design of non-functional logic used to exercise functional logic, and extract subsequent data, in order to determine the existence and location of any logic faults introduced during manufacturing.

EDA - Electonic Design Automation

ESL - Electronic System Level

Fab - Chip fabrication and manufacturing facility

FIB - Focused Ion Beam

FSDB - Fast Signal Database

IDM - Integrated Device Manufacturer, eg. Infineon

In-situ - Used to signify when the SoC is placed and operating in its intended system environment.

IP - Intellectual Property

OEM - Original Equipment Manufacturer, eg. Sony

OVL - Open Verification Library

Post-silicon - Used to signify the time after the chip has been manufactured. This term is often used to differentiate from semiconductor verification techniques employed pre-silicon, during simulation.

Pre-silicon - Used to signify the time before the chip has been manufactured. This term is often used inter-changably with “during simulation”.

PSL - Property Specification Language

RAD - Rapid Application Development

ReDI - Reconfigurable Distributed Infrastructure

RTL - Register Transfer Level

SoC - System-on-Chip. A single chip on which several discrete blocks of logic have been combined.

Test Insertion - The automatic insertion of test logic, including scan cells and test access ports, into the circuitry of a chip to enable quality testing during the manufacturing process

VCD - Value Change Dump. A standard file format used to log changes to variable values, such as the values of signals, in a file during a simulation session

Verification - The determination that one or more predetermined parameters, specifications, or requirements are met.

Verilog - A hardware description language. An industry-accepted standard language used by electronic designers to describe and design their chips and systems prior to fabrication.

VHDL - An IEEE-standard hardware description language originally developed by the U.S. Department of Defense as a common means of documenting electronic systems. Specified in the IEEE 1076 standard and used by electronic designers to describe and simulate their chips and systems prior to fabrication, an alternative language to Verilog.

Work-around - The use of otherwise redundant logic and/or signals to mask a bug.


			Glossary ASIC - Application Specific Integrated Circuit. At-speed - A function carried out using the manufactured chip at its normal operating clock frequency. BIST - Built-in Self Test. ClearBlue - A combination of sophisticated EDA software and reconfigurable on-chip instruments used to discover, diagnose and even fix functional SoC bugs in-situ. DFD - Design-for-Debug. The use of on-chip instrumentation, with specialized EDA software, to detect, diagnose, and debug functional errors in SoC's. DFM - Design-for-Manufacturability. DFT - Design-for-Testability. The insertion into an SoC design of non-functional logic used to exercise functional logic, and extract subsequent data, in order to determine the existence and location of any logic faults introduced during manufacturing. EDA - Electonic Design Automation ESL - Electronic System Level Fab - Chip fabrication and manufacturing facility FIB - Focused Ion Beam FSDB - Fast Signal Database IDM - Integrated Device Manufacturer, eg. Infineon In-situ - Used to signify when the SoC is placed and operating in its intended system environment. IP - Intellectual Property OEM - Original Equipment Manufacturer, eg. Sony OVL - Open Verification Library Post-silicon - Used to signify the time after the chip has been manufactured. This term is often used to differentiate from semiconductor verification techniques employed pre-silicon, during simulation. Pre-silicon - Used to signify the time before the chip has been manufactured. This term is often used inter-changably with “during simulation”. PSL - Property Specification Language RAD - Rapid Application Development ReDI - Reconfigurable Distributed Infrastructure RTL - Register Transfer Level SoC - System-on-Chip. A single chip on which several discrete blocks of logic have been combined. Test Insertion - The automatic insertion of test logic, including scan cells and test access ports, into the circuitry of a chip to enable quality testing during the manufacturing process VCD - Value Change Dump. A standard file format used to log changes to variable values, such as the values of signals, in a file during a simulation session Verification - The determination that one or more predetermined parameters, specifications, or requirements are met. Verilog - A hardware description language. An industry-accepted standard language used by electronic designers to describe and design their chips and systems prior to fabrication. VHDL - An IEEE-standard hardware description language originally developed by the U.S. Department of Defense as a common means of documenting electronic systems. Specified in the IEEE 1076 standard and used by electronic designers to describe and simulate their chips and systems prior to fabrication, an alternative language to Verilog. Work-around - The use of otherwise redundant logic and/or signals to mask a bug.